Saturday, March 2, 2019

Decoder

Although this is a rebuild of my early breadboard using a new microcontroller, I want to go step-by-step to make sure each part works. The first circuit is a decoder to read the bus signals and generate a latch enable (LE) and an output enable (OE') for the interface buffers I will use between the Atari and the Arduino. Here's the logic diagram:
The cartridge port has a convenient Cartridge Control (CCTL') line that was intended to be used for bank switching. CCTL' goes low with an address of $D5xx. I want to be able to latch the data bus into a buffer with 6502 executes a STA $D500. This video has a nice explanation of 6502 bus timing and this page has a write enable circuit at the bottom, both of which gave me enough background to end up with this design.

I built this up using TI HCT logic, which you can still get in DIP packages. It uses one NAND (SN74HCT00) and one AND (SN74HCT08) chip.
I connect to the cartridge port using a breakout board and monitor the signals with a FPGA board running logic analyzer firmware. To cause LE to go high, the 6502 needs to execute STA $D500. I just used a POKE command in BASIC to do this easily:
The captured signals looked like this:
Note how the clock signal PHI2 gates the LE when the CCTL and R/W are both high. The resulting signal will be used to latch the data bus into a buffer and to interrupt the Arduino.

Thanks for reading.

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